Although the fabless model frees the semiconductor industry from having to invest in pricey manufacturing facilities and equipment, it poses additional security challenges, such as malicious insertion of hardware Trojans and hardware Intellectual Property (IP) theft; it also increases the need for designing secure hardware security primitives such as Physical Unclonable Functions (PUFs) for device authentication and key generation. The situation has worsened as integrating third-party IP cores and utilizing different Electronic Design Automation (EDA) tools has become the norm. Given the current trend, we have no choice but to consider a zero-trust environment in the IC design flow. The focus of this seminar is on machine learning solutions for three critical hardware security areas, including secure execution, intellectual property protection, and hardware security primitives in a zero-trust environment.